PALCE20V8H-7PC/5 Similar

PALCE20V8H-7PC/5 Datasheet and PALCE20V8H-7PC/5 manual

Manufacturer : Lattice 

Packing : PDIP 

Pins : 24 

Temperature : Min 0 °C | Max 70 °C

Size : 569 KB

Application : EE CMOS universal programmable array logic, 7ns 

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